This invention relates generally to the field of solar cells, and more particularly to a novel alignment device and method for accurately aligning silicon wafers in the fabrication of silicon vertical junction solar cells.
The basic structure and operation of solar cells is well known, and the utilization of silicon solar cells for the generation of electricity for remote marine, terrestrial, and satellite applications is well documented. The development of the vertical junction solar cell answered the need for a radiation resistant cell having improved electrical conversion efficiency for operation in an ionizing radiation environment to which the cell may be subjected in extra-terrestrial applications. The state of the art relating to vertical junction solar cells may be exemplified by solar cell configurations disclosed by or referenced in U.S. Pat. No. 3,690,953 titled "Vertical Junction Hardened Solar Cell", U.S. Pat. No. 3,985,579 titled "Rib and Channel Vertical Multijunction Solar Cell", U.S. Pat. No. 4,409,423 titled "Hole Matrix Vertical Junction Solar Cell", and U.S. Pat. No. 4,420,650 titled "Wedged Channel Vertical Junction Silicon Solar Cell".
Vertical juncion solar cell structures known in the prior art may comprise a variety of configurations defining the vertical junctions of the solar cells. One such configuration includes a plurality of narrow grooves or channels etched into the surface of a semiconductor substrate, the channels providing the areas upon which the photovoltaic junction of the cell is diffused, the narrow ribs of the structure which define the channels providing the vertical junctions for the cell. Another configuration includes a silicon chip having in one surface a plurality of short, wedge shaped channels closely spaced in an array and separated by thin vertical ribs, the photovoltaic junction being diffused over the rib surfaces and chip surfaces between the ribs. Another cell configuration includes a silicon chip having in one surface a plurality of holes closely spaced in an array, the vertical junction areas being provided on the walls defining the holes.
Common to all the known vertical junction cell configurations with the exception of the hole matrix configuration is a fabrication constraint that the vertical junctions of the cell be accurately aligned relative to certain predetermined crystallographic planes of the semiconductor material comprising the solar cell. For example, in the fabrication of one channelled silicon vertical junction cell configuration, the cell is fabricated from a wafer having surfaces parallel to the (110) crystallographic planes and the channels aligned along (111) planes. It is therefore critical to the successful fabrication of such cells that the substrate be accurately aligned and held in the required predetermined position.
The present invention provides a novel device for aligning a mask over a silicon wafer, and method for fabricating a vertical junction solar cell wherein the mask is accurately aligned along a specified crystallographic orientation of the silicon.
It is therefore a principal object of the present invention to provide an improved device for aligning a silicon wafer for solar cell fabrication.
It is another object of the present invention to provide an improved method for aligning a silicon wafer in the fabrication of vertical junction silicon solar cells.
It is a further object of the present invention to provide an improved silicon solar cell fabrication method.
These and other objects of the present invention will become apparent as the detailed description of certain representative embodiments thereof proceeds.